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Surface Finishes for Next-Generation PCB Technologies: A Free Webinar for PCEA Members

June 28 @ 9:00 am - 11:00 am

Free

Surface Finishes for Next-Generation PCB Technologies: A free webinar for PCEA members!

Featuring Dr. Kunal Shah, CEO, Lilotree

The evolution of internet-enabled mobile devices drives innovations in the manufacturing and design of technology capable of high-frequency/high-density electronic signal transfer. Selection of materials used in PCB manufacturing is critical for optimum performance and better reliability of the electronic assembly. Among the primary factors affecting the optimum performance and better reliability is the surface finish applied on PCB copper pads.

• The webinar will cover how surface finish contribute to signal integrity and reliability of next generation electronic assemblies.
• Typically, connections (solder joints) between PCBs and surface mount components are prone to brittle failures. This course will evaluate how surface finishes can lead to robust solder joints and better reliability of electronic assemblies.

The selection criteria of surface finish for next-generation PCB technologies: 5G, high frequency, HDI, RF/microwave applications, etc., involves minimal insertion loss, long shelf life, cost-effective and better reliability. Pros and cons of some of the available options (EPIG, EPAG, DIG, etc.) will be discussed.

Detailed signal integrity and reliability evaluation of various surface finishes for next-generation PCB technologies will be covered.

 

Kunal Shah, Ph.D. is president and chief scientist at LiloTree. Dr. Shah leads efforts of advanced engineered materials development and product improvement solutions at LiloTree for numerous customers in various industries including aviation-aerospace, medical electronics, semiconductors, etc. He has been the key member in development of several plating-surface finish solutions. Previously, Dr. Shah worked as a senior research scientist at Intel and Pacific Northwest National Lab (PNNL). At Intel, he developed polymer interlayer, dielectric and passivation material that led to the design, adoption and integration of polymer passivation materials in Intel IC products in 2008. He has authored several scientific papers and issued/pending patents over two decades.

Details

Date:
June 28
Time:
9:00 am - 11:00 am
Cost:
Free
Event Category:
Event Tags:
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Website:
https://attendee.gotowebinar.com/register/4953118886721923856

Venue

Online

Organizer

PCEA
View Organizer Website